vdat2022@iitjammu.ac.in
26th International Symposium on VLSI Design and Test (VDAT-2022) | 17-19 July 2022
Theme : Chips to Startup for sustainable development

Regular Paper

Soft copies of papers should be submitted in .pdf format as per the IEEE conference paper format, submits not exceeding six A4 size pages, and paper should be uploaded through an online portal. There will be a double-blind review of the paper. Therefore, do not include the authors’ names in the submitted paper. A Paper with authors’ names will not be considered for review. The paper must include an abstract of about 250 words and a maximum of five keywords.

The acceptance of the paper is based on the following factors:

  • The purpose of the work.
  • The manner and degree to which it advances the art.
  • Specific new results have been obtained and their significance.

Authors of the accepted papers will be informed by email. Information about necessary revisions will be communicated to the corresponding author through email. The author(s) will have to incorporate the suggestions and send the revised camera-ready copy of the paper within the given time limit.

Along with the paper, authors are required to submit an undertaking form stating that the paper has not been published previously, is not under consideration for publication elsewhere, and if accepted, will not be published elsewhere in the same form. At least one of the authors must register in the non-student category for publication of the paper in proceedings. For the author presenting more than one paper, it is mandatory to register and present each paper separately.

Flyer

Submission Link

26th International Symposium on VLSI Design and Test (VDAT-2022)
17-19 July 2022

Theme : Chips to Startup for sustainable development

Contact:
Dr. Ambika Prasad Shah
vdat2022@iitjammu.ac.in

Ms. Mamta Singh
relationship.manager@iitjammu.ac.in